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ADE7752B
TIMING CHARACTERISTICS
V DD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, CLKIN = 10 MHz, T MIN to T MAX = ?40°C to +85°C, unless otherwise noted.
Table 2.
Parameter 1,2
t 1 3
t 2
t 3
t 43, 4
t 55
t 6
Conditions
F1 and F2 pulse width (logic high)
Output pulse period (see the Transfer Function section)
Time between F1 rising edge and F2 rising edge
CF pulse width (logic high)
CF pulse period (see the Transfer Function section)
Minimum time between F1 and F2 pulse
Specification
120
See Figure 2
? t 2
90
See Table 7
4/CLKIN
Unit
ms
sec
sec
ms
sec
sec
1
2
3
4
5
Sample tested during initial release and after any redesign or process changes that might affect this parameter.
See Figure 2.
The pulse widths of F1, F2, and CF are not fixed for higher output frequencies (see the Frequency Outputs section).
CF is not synchronous to F1 or F2 frequency outputs.
The CF pulse is always 1 μs in the high frequency mode (see the Frequency Outputs section).
t 1
F1
t 6
t 2
F2
t 4
t 3
t 5
CF
Figure 2. Timing Diagram for Frequency Outputs
Rev. 0 | Page 4 of 24
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